A PLC is made up of, for example, a central processing unit (CPU) unit which has a microprocessor configured to execute a control program and a plurality of units such as an input/output (IO) unit which handles the input of signals from external switches and sensors and their output to external relays and actuators. The CPU unit controls a control target by repeating the output of output data to the other units and the input of input data from them and also the execution of the control program configured to create the output data by using the input data. The control program includes a user program which is created in compliance with a control purpose on the side of the user. The control program may include a motion computing program whose execution is directed in the user program.
In the PLC, the input of the input data, the output of the output data, and the execution of the control program as well as the PLC's system program may be scheduled in various forms as illustrated below.
As indicated in Patent Document 1 (JP-A 2000-105604 (KOKAI)), in the conventional and typical PLC, in each control cycle, one sequence program (the control program) and a pair of output refresh and input refresh processes are executed. In this case, a control cycle is equal to an execution cycle of the control program.
It is also known that in the PLC, the plurality of control programs are executed by using the time-sharing system.
Patent Document 2 (JP-A2007-140655 (KOKAI)) describes that in a device in which one CPU implements a motion control function configured to control a motor and a PLC function configured to perform sequence operations, for each cycle of a basic clock signal, “fixed-cycle motion control processing and axis-specific processing” and “high-speed sequence processing” are executed and, in the remaining lapse of time of each cycle of the basic clock signal, “low-speed sequence processing” or “unfixed-cycle motion control processing” is executed. It is also described that if the low-speed sequence processing does not end in the basic clock signal cycle, the remaining processing will be executed after a halt period of a predetermined number of the basic clock signal cycles (see, for example, paragraph 0004).
Patent Document 3 (JP-A 2000-293210 (KOKAI)) describes about the operations of a control device that aside from a period task (the control program), a plurality of refresh blocks are prepared for each of input processing and output processing to be executed such that several refresh blocks and several periodic tasks may be performed selectively in each control cycle.